In the prior art, the interconnection density of double-sided circuits, such as laminated epoxy printed wiring boards (PWB) and printed circuit boards (PCB), has been limited by the plated through-holes (PTH) and polymer thick-film (PTF) inks required to electrically interconnect the circuitry on the opposite sides of the circuit structure. As used herein, a double-sided circuit board is a circuit board having conductor traces on opposite surfaces of the circuit board with electrical interconnection between the conductor traces at the opposite surfaces, and includes multi-layered boards (MLB) having electrical interconnections between at least two of its layers. Plated through-holes have been commonly used to form side-to-side connections of double-sided circuits, with PTF inks being employed where low interconnection densities are permitted. A plated through-hole is illustrated in FIG. 1, while a through-hole filled with a PTF ink is illustrated in FIGS. 2A and 2B. As shown in FIG. 1, a through-hole 12 is formed by drilling through a multi-layered board formed by two copper-clad laminates 10. The through-hole 12 is electroplated with copper to form a side-to-side interconnect 14 that electrically interconnects copper cladding 16 of the different layers of the multi-layered board. To ensure that the portion of the interconnect 14 within the through-hole 12 is sufficiently thick, the copper must be deposited at relatively low current densities over a relatively long period. As such, during the electroplating process, a copper layer 18 of appreciable thickness is also deposited on the exposed copper cladding 16, thereby increasing the effective thicknesses of conductor traces formed by the cladding 16.
From FIG. 1, it can be appreciated that PTH techniques limit circuit density because of the difficulty with which the cladding 16 and its overlying copper layer 18 are patterned to produce narrow traces desired for high density interconnections. Furthermore, the circuitry and its conductor traces must accommodate both the through-hole 12 and the interconnect 14 at the surface of the circuit layer, the diameters of which are dependent on the mechanical method by which the through-hole 12 is formed.
Two versions of the PTF technology are illustrated in FIGS. 2A and 2B, each example using a copper-clad laminate 20 through which a through-hole 22 has been formed by punching. FIG. 2A is the more common technique, and shows a side-to-side connection 24 formed with an electrically-conductive PTF ink that was screen-printed and then cured. The connection 24 electrically interconnects pads formed by etched copper cladding 26 on opposite surfaces of the laminate 20. Shrinkage during curing occurs to the extent that the connection 24 is limited to the wall of the through-hole 22. In contrast, the connection 25 shown in FIG. 2B plugs the through-hole 22 as a result of a greater amount of PTF ink being screen printed into the through-hole 22. Plugged connections 25 of the type shown in FIG. 2B are desirable if the circuit board is to be held by vacuum during manufacturing or if it is desired to prevent solder masks or other liquids from migrating from one side of the board to the other.
As can be appreciated from FIGS. 2A and 2B, circuit density is limited by the use of PTF technology as a result of the requirement for the relatively large-sized through-holes 22 required to be compatible with screen printing processes. As with connections formed by PTH techniques, PTF techniques also require that the conductive material that forms connections 24 and 25 must also cover a portion of the cladding 26 on both sides of the laminate 20 in order to promote a reliable side-to-side connection. Therefore, and again similar to PTH techniques, the circuitry and its conductor traces formed with the cladding 26 must accommodate both the through-hole 22 and the connections 24 and 25 in the circuit layer, because the traces cannot directly overlie the through-hole 22 or the connections 24 and 25.
A somewhat different process known in the art is illustrated in FIG. 3. This process entails filling a through-hole 32 with a conductive paste to form a connection 34 in a laminate 30 clad with copper foil 36. Following appropriate surface treatment, the surfaces of the entire laminate 30, including the connection 34 and the foil 36, are electrolessly plated to provide electrical continuity, then electroplated to form an additional copper layer 38 that adheres to both the connection 34 and the copper foil 36. Thereafter, the copper layers 36 and 38 are together selectively etched to form traces for circuitry on opposite sides of the laminate 30.
As with PTH and PTF techniques, the prior art of FIG. 3 is encumbered by density limitations--namely, the technique illustrated in FIG. 3 requires a copper layer 38 surrounding and overlying the connection 34 in order to form a conductive bridge between the connection 34 and the copper foil 36 immediately surrounding the connection, such that electrical continuity is achieved between the connection 34 and traces formed by the foil 36. Notably, density limitations are somewhat less severe, since the copper foil and layer 36 and 38 overlying the connection 34 can be etched to form a trace, contrary to the prior art of FIGS. 1, 2A and 2B.
As can be appreciated from the above prior art processes, the density of a double-sided or multi-layered circuit board has been limited in part by the techniques required to make side-to-side and interlayer connections. Specifically, prior art methods have required plating (FIGS. 1 and 3) and cured conductive polymers (FIGS. 2A and 2B) to form an electrical bridge between the connection and copper layers immediately surrounding the connection, with the result that the connection also occupies a signification portion of the surface surrounding the through-hole. With these prior art methods, the above is further exacerbated by the requirement that the size of the copper layers surrounding the connection be sufficient to accommodate misregistration of the plating pattern to the connection due to manufacturing and processing tolerances.
Furthermore, the density of circuits formed by the techniques of FIGS. 1 and 3 is limited by the resulting thick copper layers from which traces must be etched. The density of circuits formed by the techniques of FIGS. 1, 2A and 2B is also limited because traces cannot directly overlie the connection.
Filled side-to-side through-hole connections are utilized in the manufacture of co-fired ceramic circuit boards. However, the refractory metal pastes used with this technology to form the side-to-side connections are incompatible with printed wiring board and printed circuit board processing and material capabilities. Furthermore, the conductor traces associated with the side-to-side connection must be screen printed on the surface of a ceramic circuit board after filling the through-hole, but prior to firing the ceramic structure, to make connection to the filled through-hole. The resulting traces are invariably larger than their corresponding side-to-side connections in a manner similar to the plated through-hole structure of FIG. 1.
From the above, it can be appreciated that as the desire for more dense circuits intensifies for applications such as consumer electronic products, there is a need to provide improved methods and techniques for forming through-hole connections that do not limit the precision with which conductor traces are formed or increase the spacing between adjacent conductor traces within a given circuit layer.